Unlike theoretical texts, Van Zant dedicates significant space to contamination control. He explains the Class 1, Class 10, and Class 1000 cleanroom standards (ISO 14644-1 equivalents), air flow patterns, and bunny suits. For a technician starting in a fab, this is survival information.
Mostly, yes. Van Zant stops at the basics of Copper interconnects and early 300mm wafers. He doesn't cover EUV lithography (extreme ultraviolet), Gate-All-Around FETs, or advanced 3D NAND stacking.
However: If you cannot explain how a planar MOSFET is made, you will never understand a FinFET. Van Zant builds the fundamental vocabulary. Once you know his language, you can read the white papers on GAA.
Example: For defect density D0=0.5/cm^2 and device area A=1e-6 cm^2, wafer-level yield per device ≈ exp(-0.5×1e-6) ≈ 0.9999995; for large chips area matters greatly.
Van Zant does not shy away from the business reality. A modern fab costs $10–20 billion. The equipment (EUV scanners from ASML costing $200 million each) is obsolete within 5 years. The essay concludes by analyzing the limits Van Zant foresaw: the atomic limit (gates at 3nm are only 15 silicon atoms wide), quantum tunneling (leakage current), and the end of Dennard scaling (transistors no longer get faster as they shrink due to power density).
Van Zant’s final chapters discuss 3D NAND (stacking layers), gate-all-around FETs (GAAFET), and the possible post-silicon era (graphene, carbon nanotubes). Yet, his ultimate lesson is humility: The chip is the most complex mass-produced artifact in history. Its fabrication requires the coordination of physics, chemistry, mechanical engineering, and logistics.